Direct Bonding

Die-to-Wafer Direct Bonding for Production Environment with a New Flip-Chip Bonder

MiNaPAD 2019 Conference proceeding P. Metzger, N. Raynaud
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New Flip-Chip Bonder dedicated to Direct Bonding for Production Environment

ESTC 2018 Conference proceeding SET, CEA Leti
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Toward a Flip-Chip Bonder dedicated to Direct Bonding for Production Environment

IWLPC 2017 Bonding SET, Saint-Jeoire, France
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Chip-to-Wafer Technologies for High Density 3D Integration

MiNaPAD 2011 Conference proceeding CEA Leti, Minatec campus, CNRS Cemes, ALES, SET, ST Microelectronics
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Process

Used to assemble two components, Direct / Hybrid Bonding offers three important advantages:

Low bonding force
Bonding process at room temperature
Short process cycle

However, there is one challenge at the bonding step: the components must possess a very high level of cleanliness.

Technology benefits

The bonding process requires low force and room temperature to circumvent the thermal expansion of different materials This enables high-accuracy bonding for high-density interconnections.

To ensure void-free bonding, the alignment and bonding steps must occur in a particle-free environment. This is accomplished through the use of special materials and careful airflow management.

All of these advantages allow for reaching the high throughput required for widespread adoption of 3D Integration.

Comprehensive experience

In 2009, SET, in partnership with CEA-Leti, ST-Microelectronics, ALES and CEMES-CNRS, began a collaboration dubbed the PROCEED Project, with support from Minalogic and the French government (FUI – Fond Unique Interministériel).

During the PROCEED Project, SET used a specially-designed FC300 to successfully demonstrate the feasibility of a Die-to-Wafer approach using Direct / Hybrid Bonding with an accuracy < 1μm. Our efforts were the subject of numerous articles.

At the end of 2015, SET joined IRT Nanoelec in designing a rapid, high-accuracy Flip-Chip Bonder dedicated to Direct / Hybrid Bonding. Capitalizing on the experience gained from the PROCEED Project, SET designed and developed the NEO HB for production.

In 2019, SET launched the NEO HB at SEMICON Taiwan, thus meeting the high throughput necessary for widespread adoption of 3D Integration.