Technical papers

Embedded active device packaging technology for real DDR2 memory chips

Low Temperature Bonding of High Density Large Area Array Interconnects for 3D Integration

3D-IC Integration using D2C or D2W Alignment Schemes together with Local Oxide Reduction

Die-to-wafer bonding of thin dies using a 2-step approach: high accuracy placement, then gang bonding

Flip-chip die bonding: an enabling technology for 3D integration

Development done on Device Bonder to Address 3D Requirements in a Production Environment

Development done on Device Bonder to address 3D requirements in a Production Environment

Flip-Chip Assembly FPA

Die-to-Die and Die-to-Wafer Bonding solution for High Density, Fine Pitch Micro-Bumped Die

Process and Equipment Enhancements for C2W bonding in a 3D Integration Scheme